________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 1 / 1 0 u m 2001 p bidirectional v oltage l evel t ranslator for o pen - d rain and p ush - p ull a pplications um 2001 p s ot363 general description the um 2001 p is a bidirectional voltage level t ranslator operational from 1.0 v to 3.6 v (v cca ) and 1.8v to 5.5 v (v ccb ), which allow s bidirec tional voltage translations between 1.0v and 5v without the need for a direction pin in open - drain or push - pull applications. the um 2001 p is a 1 - bit level translator. its transmission sp eeds are below 33mhz for an ope n - drain system with a 50pf capacitance and a pull - up resistor of 197 . the low on - state resistance ( r on ) of the switch allows connections to be made with minimal propagation delay. when en is high, the translator switch is on, and the a i/o is connected to the b i/o, allowing bidirectional dat a flow between ports. when en is low, the translator switch is off, and a high - impedance state exists between ports. the translator s provide excellent esd protection to lower voltage devices, and at the same time protect less esd - resistant devices. applic ations features ? spi, microwire, and i 2 c level translation ? low - voltage asic level translation ? smart card readers ? cell - phone c r a dles ? portable pos systems ? portable communication devices ? low - cost serial interfaces ? cell - phones ? gps ? telecommunications equipm ent ? consumer electronics ? household appliances ? provides bidirectional voltage translation with no direction pin ? less than 1.5 ns maximum propagation delay ? low 3.5 on ? 5v toleran t i/o ports to support mixed - mode signal operation ? high - impedance a and b pins for en= low ? latch u p free operation ? flow through pinout for ease of printed - circuit board trace routing ? esd protection exceeds : 4kv hbm per jesd22 - a114 ? package offered: sot363 pin configurations top view m : month code um 2001 p so t363 1 2 3 4 5 6 a v c c a g n d e n v c c b b u a 3 m 1 2 3 4 5 6 u a 3 m
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 2 / 1 0 u m 2001 p pin description pin number symbol function 1 a low - voltage side; connected to v cc a through a pull - u p resistor 2 v cc a low - voltage side reference supply voltage for a 3 gnd ground (0v) 4 en switch enable input; connected to v cc b and pulled - up through a high resistor 5 v cc b high - voltage side reference supply voltage for b 6 b high - voltage side; connec ted to v cc b through a pull - up resistor o rdering information part number packaging type marking code s hipping qty um 2001 p so t363 ua3 3000 pcs/ 7 inch tape & reel absolute maximum ratings (note 1) over operating free - air temperature range (unless otherwi se noted) symbol parameter value unit v cca reference voltage (a) - 0.5 to +6 v v ccb reference voltage (b) - 0.5 to +6 v v i input voltage - 0.5(note 2) to +6 v v i/o voltage on an input/output pin - 0.5(note 2) to +6 v i ch channel current (dc) +128 ma i ik input clamp current v i stg storage temperature - 65 to +150 c note 1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. exposure to absolute - maximum - rated conditions for extended periods may affect device reliability. note 2: the input and input/output negative voltage ratings may be exceeded if the input and input/output clamp current ratings are observed.
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 3 / 1 0 u m 2001 p recommended operating conditions symbol parameter conditions min max unit v i/o voltage on an input/output pin a, b 0 5.5 v v cca (note 3 ) reference voltage (a) v cc a 0 5. 5 v v ccb (note 3 ) reference voltage (b) v cc b 0 5.5 v v i(en) input voltage on pin en 0 5.5 v i sw(pass) pass switch current 64 ma t amb ambient temperature operating in free - air - 40 +85 c note 3 : v cca v ccb ? 1 v for best results in level shifting applicat ions. electrical characteristics t amb = ?40 c to +85 c, unless otherwise specified. symbol parameter conditions min typ (note 4 ) max unit v ik input clamping voltage i i = ?18 i(en) = 0 v - 1.2 v i ih high - level input current v i = 5v; v i(en) = 0 v 5 i(en) input capacitance on pin en v i = 0v or 3 v 12 pf c io(off) off - state input/output capacitance a, b ; v o = 0v or 3 v ; v i(en) = 0 v 10 12 pf c io(on) on - state input/output capacitance a, b ; v o = 0v or 3 v ; v i(en) = 3 v 8 12.5 (note 5 ) pf r on on - state resistance (note 6 ) a, b; v i = 0 v; i o = 64 ma; v i(en) = 4.5 v (note 7 ) 1 2.5 5.0 i = 2.4 v; i o = 15 ma; v i(en) = 4.5 v 4.5 7.5 note 4 : all typical values are at t amb = 25c. note 5 : not production tested, maximum value based on cha racterization data of typical parts. note 6 : measured by the voltage drop between the a an d b terminals at the indicated current through the switch. on - state resistance is determined by the lowest voltage of the two terminals. note 7 : guaranteed by design.
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 4 / 1 0 u m 2001 p switching characteristics (translating down) over recommended operating free - air temperature range(unless otherwise noted). values guaranteed by design. symbol parameter test conditions c l =50pf c l =30pf c l =15pf unit min max min max min max v i(en) = 3.3 v; v ih = 3.3v; v il = 0v; v m =1.15v( see figure 1 ). t plh low to high propagation delay from (input) b to (output) a 0 3 .5 0 2 .7 0 2 .2 ns t phl high to low propagation delay 0 3 .5 0 3 .0 0 2 .3 ns v i(en) =2.5v; v ih = 2.5 v; v il = 0 v; v m = 0.75 v ( see figur e 1 ). t plh low to high propagation delay from (input) b to (output) a 0 3 .5 0 2 .7 0 2 .2 ns t phl high to low propagation delay 0 4 .0 0 3 .0 0 2 .3 ns switching characteristics (translating up ) over recommended operating free - air temperature range(unless otherwise noted). values guaranteed by design. symbol parameter test conditions c l =50pf c l =30pf c l =15pf unit min max min max min max v i(en) = 3.3 v; v ih = 2.3 v; v il = 0 v; v tt = 3.3 v; v m = 1.15 v; r l = 300 plh low to high propagation d elay from (input) a to (output) b. 0 3 .35 0 2 .5 0 2 . 0 ns t phl high to low propagation delay 0 4 .35 0 3 .25 0 2 .4 ns v i(en) =2.5v; v ih = 1.5 v; v il = 0 v; v tt = 2.5 v; v m = 0.75 v; r l = 300 ( plh low to high propagation delay from (input) a t o (output) b. 0 3 .35 0 2 .5 0 2 . 0 ns t phl high to low propagation delay 0 4 .5 0 3 .5 0 2 . 5 ns
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 5 / 1 0 u m 2001 p applications information detail description the um 2001 p is a bidirectional voltage level t ranslator operational from 1.0v to 3. 6v (v cca ) and 1.8v to 5.5v (v ccb ), which allow s bidirectional voltage translations between 1.0v and 5v without the need for a direction pin in open - drain or push - pull applications. when the a or b port is low, the clamp is in the on - state and a low resista nce connection exists between the a and b ports. the low on - state resistance (r on ) of the switch allows connections to be made with minimal propagation delay. assuming the higher voltage is on the b port when the b port is high, the voltage on the a port i s limited to the voltage set by v cca . when the a port is high, the b port is pulled to the drain pull - up supply voltage (v pu(d) ) by the pull - up resistors. this functionality allows a seamless translation between higher and lower voltages selected by the us er without the need for directional control. when en is high, the translator switch is on, and the a i/o is connected to the b i/o, allowing bidirectional data flow between ports. when en is low, the translator switch is off, and a high - impedance state exi sts between ports. the en input circuit is designed to be supplied by v ccb . to ensure the high - impedance state during power - up or power - down, en must be low. all channels have the same electrical characteristics and there is minimal deviation from one outp ut to another in voltage or propagation delay. this is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical. c l s 2 ( o p e n ) s 1 r l v t t f r o m o u t p u t u n d e r t e s t i n p u t o u t p u t v m v i h v i l v o h v o l v m v m v m a . l o a d c i r c u i t b . t i m i n g d i a g r a m ; h i g h - i m p e d a n c e s c o p e p r o b e u s e d s 1 = t r a n s l a t i n g u p ; s 2 = t r a n s l a t i n g d o w n . c l i n c l u d e s p r o b e a n d j i g c a p a c i t a n c e . a l l i n p u t p u l s e s a r e s u p p l i e d b y g e n e r a t o r s h a v i n g t h e f o l l o w i n g c h a r a c t e r i s t i c s : p r r 1 0 m h z ; z o = 5 0 ; t r 5 n s ; t f 5 n s . t h e o u t p u t s a r e m e a s u r e d o n e a t a t i m e , w i t h o n e t r a n s i t i o n p e r m e a s u r e m e n t . f i g 1 . l o a d c i r c u i t f o r o u t p u t s
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 6 / 1 0 u m 2001 p enable and disable v c c i 2 c - b u s m a s t e r i / o g n d u m 2 0 0 1 p 2 1 3 6 5 4 s w g n d r p u a v c c a v c c a = 1 . 8 v ( 1 ) v c c i 2 c - b u s d e v i c e i / o g n d e n v c c b 2 0 0 k r p u b v p u ( d ) = 3 . 3 v ( 1 ) ( 1 ) t h e a p p l i e d v o l t a g e s a t v c c a a n d v p u ( d ) s h o u l d b e s u c h t h a t v c c b i s a t l e a s t 1 v h i g h e r t h a n v c c a f o r b e s t t r a n s l a t o r o p e r a t i o n . f i g 2 . t y p i c a l a p p l i c a t i o n c i r c u i t ( s w i t c h a l w a y s e n a b l e d ) v c c i 2 c - b u s m a s t e r i / o g n d u m 2 0 0 1 p 2 1 3 6 5 4 s w g n d r p u a v c c a v c c a = 1 . 8 v ( 1 ) v c c i 2 c - b u s d e v i c e i / o g n d e n v c c b 2 0 0 k r p u b v p u ( d ) = 3 . 3 v ( 1 ) ( 1 ) i n t h e e n a b l e d m o d e , t h e a p p l i e d e n a b l e v o l t a g e v i ( e n ) a n d t h e a p p l i e d v o l t a g e a t v c c a s h o u l d b e s u c h t h a t v c c b i s a t l e a s t 1 v h i g h e r t h a n v c c a f o r b e s t t r a n s l a t o r o p e r a t i o n . f i g 3 . t y p i c a l a p p l i c a t i o n c i r c u i t ( s w i t c h e n a b l e c o n t r o l ) o n o f f 3 . 3 v e n a b l e s i g n a l ( 1 )
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 7 / 1 0 u m 2001 p bidirectional translation for the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the en input must be connected to v ccb and both pins pulled to high side v pu(d) through a pull - up resistor (typi cally 200 k). this allows v cc b to regulate the en input. a filter capacitor on v cc b is recommended. the master output driver can be totem pole or open - drain (pull - up resistors may be required) and the slave device output can be totem pole or open - drain (pu ll - up resistors are required to pull the b output to v pu(d) ). however, if either output is totem pole, data must be unidirectional or the outputs must be 3 - stateable and be controlled by some direction - control mechanism to prevent high - to - low contentions i n either direction. if both outputs are open - drain, no direction control is needed. the reference supply voltage (v cca ) is connected to the processor core power supply voltage. when v cc b is connected through a 200 k resistor to a 3.3v to 5.5 v v pu(d) power supply, and v cca is set between 1.0 v and (v pu(d) ? 1 v), the output of a has a maximum output voltage equal to v cc a, and the output of b has a maximum output voltage equal to v pu(d) . application operating conditions refer to figure 2 symbol parameter conditions min typ (note 8 ) max unit v ccb reference voltage (b) v cca + 0.6 2.1 5 v v i(en) input voltage on pin en v cca + 0.6 2.1 5 v v cca reference voltage (a) 0 1.5 4.4 v i sw(pass) pass switch current 14 ma i ref reference current transistor 5 a amb ambient temperature operating in free - air - 40 +85 c note 8 : all typical values are at t amb = 25 c. sizin g pull - up resistor the pull - up resistor value needs to limit the current through the pass transistor when it is in the on state to about 15 ma. thi s ensures a pass voltage of 260mv to 350 mv. if the current through the pa ss transistor is higher than 15 ma, the pass voltage also is higher in the on state. to set the current thr ough each pass transistor at 15 ma, the pull - up resistor value is cal culated as: the table below summarizes resistor reference voltage s and currents at 15ma, 10 ma, and 3 ma. the resistor values shown in the +10 % column or a larger value should be used to ensure that the pass voltage of the transistor would be 350 mv or less. the external driver must be able to sink the total current from the resistors on both sides of the um 200 1p device at 0.175 v, although the 15ma only applies to current flowing through the um 2001 p device . a v v r d pu pu 015 . 0 35 . 0 ) ( ? ?
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 8 / 1 0 u m 2001 p pull - up resistor values c alculated for v ol = 0.35 v; assumes output driver v ol = 0.175 v at stated current. v pu(d) pull - up resistor value ( ) 15ma 10ma 3ma nominal +10 % (note 9 ) nominal +10 % (note 9 ) nominal +10 % (note 9 ) 5v 310 341 465 512 1550 1705 3.3v 197 217 295 325 98 3 1082 2.5v 143 158 215 237 717 788 1.8v 97 106 145 160 483 532 1.5v 77 85 115 127 383 422 1.2v 57 63 85 94 283 312 note 9 : +10 % to compensate for v cc range and resistor tolerance.
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 9 / 1 0 u m 2001 p package information um 2001 p so t363 outline drawing dimensions symbol millimeters inches min max min max a 0.900 1.100 0.035 0.043 a1 0.000 0.100 0.000 0.004 a2 0 .900 1.000 0.03 6 0.039 b 0.1 0 0 0.350 0.00 4 0.014 c 0.080 0.220 0.003 0.009 d 1.800 2.200 0.071 0.087 e 1.150 1.350 0.045 0.053 e1 2.000 2.450 0.079 0.096 e 0.650ref 0.026ref e1 1.200 1.400 0.047 0.055 l 0. 525 ref 0.02 1 ref l1 0.260 0.460 0.010 0.018 0 8 0 8 land pattern notes: 1. compound dimension: 2. 0 0 1. 25; 2. unit: mm; 3.general tolerance 0.05mm unless otherwise specified; 4. the layout is just for reference. tape and reel orientation e e 1 d e 1 b t o p v i e w e n d v i e w s i d e v i e w 1 2 3 4 5 6 1 . 3 0 0 . 3 5 0 . 8 0 1 . 9 4 u a 3 m
________________________________________________________________________ http://www.union - ic.com rev .0 3 dec .201 4 10 / 1 0 u m 2001 p important notice the information in this document has been carefully reviewed and is believed to be accurate. nonetheless, this document is subject to change without notice. union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or t o keep current the contained information, or to notify a person or organization of any update. union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. union semiconductor, inc add : unit 606, no.570 shengxia r oa d, shanghai 2012 10 tel: 021 - 5109 3966 fax: 021 - 51026018 website: www.union - ic.com
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